Completion Optimization
How can a PDBF be optimized before conventional logic synthesis?
PDBF → Opportunity Space → Legal Completion
Read Paper I →The Official Home of GT Synthesis
Optimize the Boolean function before optimizing the circuit.
A unified research program built on Completion Optimization, Contextual PDBFs, and Native Sequential Device PDBFs.
GT Synthesis PrincipleDiscover functional freedom → optimize the PDBF → optimize the circuit.
01
The trilogy
Three papers. One theory of functional optimization.
Contextual PDBFs
How can ordinary RTL reveal hidden partially defined Boolean functions?
RTL Context → Reachability → Contextual PDBF
Read Paper II →Sequential Device PDBFs
Why is sequential logic inherently partially defined?
Sequential Device → R / U → Sequential Opportunity Space
Read Paper III →02
The scientific progression
From given PDBFs to native sequential partiality
Paper I
A PDBF is given
Completion Optimization selects a favorable function from its Legal Completions.
→
Paper II
A PDBF is revealed by context
Unreachable local terms inside RTL blocks become contextual don’t-cares.
→
Paper III
A PDBF is native to sequential logic
ONLY reachable behavior defines correctness; unreachable behavior defines optimization freedom.
03
Signature examples
Understand the theory through transparent experiments
01
OR–XOR
One don’t-care, two Legal Completions, and a decisive implementation difference.
02
7SDD
A familiar decoder demonstrating multiple area–depth trade-offs across Legal Completions.
03
Three-State Controller
Two unreachable state/input combinations reduce the complete implementation from 7 gates to 4.
04
Semantics-driven design
Native PDBFs begin with the meaning of the data
Characters, tokens, dates, sensor measurements, protocol symbols, and controller states often occupy only a fraction of their available encoding spaces.
Those restrictions are not artificial don’t-cares. They come directly from application semantics and naturally define PDBFs that GT can optimize.
Explore semantics-driven hardware designDesign from semantics first.
Synthesize from PDBFs second.
Optimize with GT third.
Synthesize from PDBFs second.
Optimize with GT third.
Sequential logic is inherently partially defined.
ONLY reachable behavior defines correctness.
Unreachable behavior defines optimization freedom.