Completion Optimization
How can a PDBF be optimized before conventional logic synthesis?
The Official Home of GT Synthesis
A research program built on Completion Optimization, Contextual PDBFs, Native Sequential Device PDBFs, and direct synthesis under care-domain compatibility.

The trilogy
How can a PDBF be optimized before conventional logic synthesis?
How can ordinary RTL reveal hidden partially defined Boolean functions?
Why is sequential logic inherently partially defined?
Beyond the trilogy
Paper IV asks what happens when synthesis is formulated directly from the semantic care domain rather than from one predetermined complete Boolean behavior.
Across processor-control and protocol-oriented benchmarks, direct semantic synthesis discovers implementations that are often substantially smaller and shallower than those obtained by the evaluated conventional synthesis flow.
The scientific progression
Completion Optimization selects a favorable function from its Legal Completions.
Unreachable local terms inside RTL blocks become contextual don’t-cares.
ONLY reachable behavior defines correctness; unreachable behavior defines optimization freedom.
Signature examples
One don’t-care, two Legal Completions, and a decisive implementation difference.
A familiar decoder demonstrating multiple area–depth trade-offs across Legal Completions.
Two unreachable state/input combinations reduce the complete implementation from 7 gates to 4.
Semantics-driven design
Characters, tokens, dates, sensor measurements, protocol symbols, and controller states often occupy only a fraction of their available encoding spaces.
Those restrictions are not artificial don’t-cares. They come directly from application semantics and naturally define PDBFs that GT can optimize.
Explore semantics-driven hardware designSequential logic is inherently partially defined.
ONLY reachable behavior defines correctness.
Unreachable behavior defines optimization freedom.